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yosys - Yosys Open SYnthesis Suite, including Verilog synthesizer

Website: http://www.clifford.at/yosys/
License: ISC and MIT
Vendor: Fedora Project
Description:
Yosys is a framework for Verilog RTL synthesis. It currently has
extensive Verilog-2005 support and provides a basic set of synthesis
algorithms for various application domains.

Packages

yosys-0.7-1.fc24.x86_64 [1.7 MiB] Changelog by Eric Smith (2016-11-26): 
- Updated to latest upstream release.
- Additional changes per package review.
yosys-0.7-1.fc24.i686 [1.8 MiB] Changelog by Eric Smith (2016-11-26): 
- Updated to latest upstream release.
- Additional changes per package review.

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